- 专利标题: Method for forming solder bumps using sacrificial layer
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申请号: US15936014申请日: 2018-03-26
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公开(公告)号: US10535592B2公开(公告)日: 2020-01-14
- 发明人: Eric P. Lewandowski , Jae-Woong Nah , Peter J. Sorce
- 申请人: International Business Machines Corporation
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Scully, Scott, Murphy & Presser, P.C.
- 代理商 L. Jeffrey Kelly, Esq.
- 主分类号: H01L23/498
- IPC分类号: H01L23/498 ; H01L21/48 ; H01L21/027 ; H01L21/3205 ; H01L21/3213 ; H05K3/06 ; H05K3/12 ; H05K3/34 ; H05K3/40
摘要:
A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.
公开/授权文献
- US20180218971A1 METHOD FOR FORMING SOLDER BUMPS USING SACRIFICIAL LAYER 公开/授权日:2018-08-02
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