Invention Grant
- Patent Title: Symmetrical dual voltage level input-output circuitry
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Application No.: US16057211Application Date: 2018-08-07
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Publication No.: US10541676B2Publication Date: 2020-01-21
- Inventor: Venkateswara Reddy Pothireddy , Wahed Abdul Mohammed
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Ebby Abraham; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K3/012
- IPC: H03K3/012 ; H03K17/687 ; H03K19/0185

Abstract:
In a described example, an apparatus includes a driver circuit coupled to an output pad, the driver having a p-channel FET coupled between a positive peripheral voltage and the pad, and having a first gate terminal coupled to a first gate control signal, and an n-channel FET coupled between the pad and a ground terminal and having a second gate terminal coupled to a second gate control signal. A predriver circuit is coupled to receive a data signal for output to the pad and further coupled to output the first gate control signal; and the predriver circuit is coupled to output a supply voltage to the first gate control signal in a first mode, and to output a bias voltage less than the supply voltage to the first gate control signal in a second mode; and a bias circuit is coupled for outputting the bias voltage.
Public/Granted literature
- US20190058460A1 SYMMETRICAL DUAL VOLTAGE LEVEL INPUT-OUTPUT CIRCUITRY Public/Granted day:2019-02-21
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