Invention Grant
- Patent Title: Dynamic element matching in an integrated circuit
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Application No.: US15616765Application Date: 2017-06-07
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Publication No.: US10545053B2Publication Date: 2020-01-28
- Inventor: Umanath R. Kamath , Padraig Kelly , John K. Jennings
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: G01K7/00
- IPC: G01K7/00 ; G01K7/01 ; H03K19/003 ; H03K19/0175 ; G01K1/02

Abstract:
An example dynamic element matching (DEM) circuit includes: a plurality of bipolar junction transistors (BJTs), each of the plurality of BJTs having a base terminal and a collector terminal coupled to electrical ground; a plurality of pairs of force switches, each pair of force switches coupled to an emitter of a respective one of the plurality of BJTs; a plurality of pairs of sense switches, where each pair of sense switches is coupled to the emitter of a respective one of the plurality of BJTs, a first switch in each pair of sense switches is coupled to a first node, and a second switch in each pair of sense switches is coupled to a second node; a first current source coupled to a first switch in each pair of force switches; and a second current source coupled to a second switch in each pair of force switches.
Public/Granted literature
- US20180356294A1 DYNAMIC ELEMENT MATCHING IN AN INTEGRATED CIRCUIT Public/Granted day:2018-12-13
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