- Patent Title: Systems and methods for acquiring data for loads at different access times from hierarchical sources using a load queue as a temporary storage buffer and completing the load early
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Application No.: US15469457Application Date: 2017-03-24
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Publication No.: US10552334B2Publication Date: 2020-02-04
- Inventor: Karthikeyan Avudaiyappan , Paul G. Chan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: NDWE, LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F12/0897 ; G06F12/0855 ; G06F9/38 ; G06F12/0862 ; G06F12/0864 ; G06F12/0875
Abstract:
A method and system acquires cache line data associated with a load from respective hierarchical cache data storage components. As a part of the method and system, a store queue is accessed for one or more portions of a cache line associated with the load, and, if the one or more portions of the cache line is held in the store queue, the one or more portions of the cache line is stored in a load queue location associated with the load. The load is completed if the one or more portions of the cache line stored in the load queue location includes all portions of the cache line associated with the load.
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