Invention Grant
- Patent Title: Electronic device and method for manufacturing a semiconductor package structure
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Application No.: US16040240Application Date: 2018-07-19
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Publication No.: US10573572B2Publication Date: 2020-02-25
- Inventor: Hsu-Nan Fang , Chien-Ching Chen
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/498 ; H01L23/00 ; H01L21/48 ; H01L21/56

Abstract:
An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.
Public/Granted literature
- US20200027804A1 ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2020-01-23
Information query
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