公开(公告)号：US11217498B2

公开(公告)日：2022-01-04

申请号：US16671988

申请日：2019-11-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chien-Ching Chen ,  Chen Yuan Weng

IPC: H01L23/31 ,  H01L23/29 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor package includes a semiconductor die having a first surface and a second surface opposite to the first surface, a conductive wiring layer stacked with the semiconductor die and proximal to the first surface, an encapsulant encapsulating the semiconductor die and stacked with the conductive wiring layer, and a replacement structure exposing from the encapsulant and being free of fillers. A method for manufacturing the semiconductor package is also disclosed in the present disclosure.

公开(公告)号：US10573572B2

公开(公告)日：2020-02-25

申请号：US16040240

申请日：2018-07-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chien-Ching Chen

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.