Invention Grant
- Patent Title: Method, device and article to test digital circuits
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Application No.: US14986053Application Date: 2015-12-31
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Publication No.: US10578672B2Publication Date: 2020-03-03
- Inventor: David Jacquet , Didier Fuin
- Applicant: STMicroelectronics (Grenoble 2) SAS
- Applicant Address: FR Grenoble
- Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
- Current Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
- Current Assignee Address: FR Grenoble
- Agency: Seed IP Law Group LLP
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G01R31/3177 ; G01R31/3185

Abstract:
A digital circuit includes a scan chain which loads data into and unloads data from the digital circuit. Checking circuitry is coupled to the scan chain and generates a first digital signature based on data indicative of a pre-testing status of the digital circuit as the data is unloaded from the digital circuit via the scan chain. When testing is completed, the data is restored to the digital circuit via the scan chain. The checking circuitry generates a second digital signature as the data is loaded into the digital circuit. The first digital signature is compared to the second digital signature to verify an integrity of the process. A specific data pattern may be loaded into the scan chain as the data is unloaded. An output of the scan chain may be monitored to detect the pattern and an error signal may be generated based on when the pattern is detected.
Public/Granted literature
- US20170192053A1 METHOD, DEVICE AND ARTICLE TO TEST DIGITAL CIRCUITS Public/Granted day:2017-07-06
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