In the disclosed design systems and methods, a schematic diagram includes nets and, connected to at least some nets, single-pin first and second imaginary devices. On any given net, a first imaginary device is associated with a tracking group property of the net (where nets in the same tracking group are in-phase) and a second imaginary device is associated with a voltage property of the net. A design layout generated based on the schematic diagram includes: net shapes representing the nets and, on net shapes that represent nets connected to the imaginary devices, tracking group and voltage labels corresponding to the tracking group and voltage properties. Net shape placement within the design layout and design rule checking are performed according to design rules that dictate placing net shapes with the same tracking group label together and further dictate minimum allowable spacing requirements depending upon the tracking group and voltage labels.