- Patent Title: Apparatus for correcting linearity of a digital-to-analog converter
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Application No.: US16218334Application Date: 2018-12-12
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Publication No.: US10581442B2Publication Date: 2020-03-03
- Inventor: John G. Kauffman , Udo Schuetz
- Applicant: Intel IP Corporation
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H03M1/00
- IPC: H03M1/00 ; H03M1/06 ; H03M1/10 ; H03M3/00 ; H03M1/12 ; H03M1/80 ; H03M1/74

Abstract:
Described is an apparatus which comprises: a digital-to-analog converter (DAC) having a DAC cell with p-type and n-type current sources and an adjustable strength current source which is operable to correct non-linearity of the DAC cell caused by both the p-type and n-type current sources; and measurement logic, coupled to the DAC, having a reference DAC cell with p-type and n-type current sources, wherein the measurement logic is to monitor an integrated error contributed by both the p-type and n-type current sources of the DAC cell, and wherein the measurement logic is to adjust the strength of the adjustable strength current source according to the integrated error and currents of the p-type and n-type current sources of the reference DAC cell.
Public/Granted literature
- US20190123751A1 APPARATUS FOR CORRECTING LINEARITY OF A DIGITAL-TO-ANALOG CONVERTER Public/Granted day:2019-04-25
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