Invention Grant
- Patent Title: Wear leveling
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Application No.: US16510236Application Date: 2019-07-12
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Publication No.: US10585597B2Publication Date: 2020-03-10
- Inventor: Richard E. Fackenthal , Duane R. Mills
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G06F3/06 ; G11C14/00 ; G11C11/22 ; G06F12/02 ; G11C16/34
Abstract:
In an example, a portion of a memory array may be selected to be wear leveled based on how often the portion is or is to be accessed. The portion may be wear leveled.
Public/Granted literature
- US20190332281A1 WEAR LEVELING Public/Granted day:2019-10-31
Information query
