Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16110203Application Date: 2018-08-23
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Publication No.: US10593702B2Publication Date: 2020-03-17
- Inventor: Masaki Tamaru , Kazuyuki Nakanishi , Hidetoshi Nishimura
- Applicant: SOCIONEXT INC.
- Applicant Address: JP Kanagawa
- Assignee: Socionext Inc.
- Current Assignee: Socionext Inc.
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2009-294231 20091225
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L27/092 ; H01L27/118 ; H01L21/8238

Abstract:
A well potential supply region is provided in an N-type well region of a cell array. Adjacent gates disposed in both sides of the well potential supply region in the horizontal direction and adjacent gates disposed in further both sides thereof are disposed at the same pitch. In addition, an adjacent cell array includes four gates each of which is opposed to the adjacent gates in the vertical direction. In other words, regularity in the shape of the gate patterns in the periphery of the well potential supply region is maintained.
Public/Granted literature
- US20180366490A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-12-20
Information query
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