• 专利标题: Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure
  • 申请号: US16122801
    申请日: 2018-09-05
  • 公开(公告)号: US10599407B2
    公开(公告)日: 2020-03-24
  • 发明人: Albert Meixner
  • 申请人: Google LLC
  • 申请人地址: US CA Mountain View
  • 专利权人: Google LLC
  • 当前专利权人: Google LLC
  • 当前专利权人地址: US CA Mountain View
  • 代理机构: Fish & Richardson P.C.
  • 主分类号: G06F8/41
  • IPC分类号: G06F8/41 G06F9/30 G06F9/345 G06F9/38
Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure
摘要:
A method is described that includes translating higher level program code including higher level instructions having an instruction format that identifies pixels to be accessed from a memory with first and second coordinates from an orthogonal coordinate system into lower level instructions that target a hardware architecture having an array of execution lanes and a shift register array structure that is able to shift data along two different axis. The translating includes replacing the higher level instructions having the instruction format with lower level shift instructions that shift data within the shift register array structure.
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