Invention Grant
- Patent Title: Power and ground design for through-silicon via structure
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Application No.: US15404093Application Date: 2017-01-11
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Publication No.: US10600759B2Publication Date: 2020-03-24
- Inventor: Chih-Pin Hung , Ying-Te Ou , Pao-Nan Lee
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/522 ; H01L23/528 ; H01L25/00 ; H01L23/31

Abstract:
In one or more embodiments, a semiconductor device includes a substrate, a first dielectric layer and a first conductive layer. The substrate includes a first surface and a second surface opposite the first surface. The first dielectric layer is on the first surface of the substrate. The first conductive layer is on the first surface of the substrate and includes a first portion on the first dielectric layer and a second portion surrounded by the first dielectric layer. The second portion of the first conductive layer extends from the first portion of the first conductive layer through the first dielectric layer to contact the first surface of the substrate.
Public/Granted literature
- US20170200702A1 POWER AND GROUND DESIGN FOR THROUGH-SILICON VIA STRUCTURE Public/Granted day:2017-07-13
Information query
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