Invention Grant
- Patent Title: Memory components and controllers that calibrate multiphase synchronous timing references
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Application No.: US15794177Application Date: 2017-10-26
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Publication No.: US10607670B2Publication Date: 2020-03-31
- Inventor: Thomas Giovannini , Scott Best , Lei Luo , Ian Shaeffer
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: The Neudeck Law Firm, LLC
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G11C7/22 ; G11C29/02 ; G11C29/50 ; G11C29/56

Abstract:
A first timing reference signal and a second timing reference signal are sent to a memory device. The second timing reference signal has approximately a quadrature phase relationship with respect to the first timing reference signal. A plurality of serial data patterns are received from the memory device. The transitions of the first timing reference and the second timing reference determining when transitions occur between the bits of the plurality of data patterns. Timing indicators associated with when received transitions occur between the bits of the plurality of data patterns are received from the memory device. The timing indicators are each measured using a single sampler. Based on the timing indicators, a first duty cycle adjustment for the first timing reference signal, a second duty cycle adjustment for the second timing reference signal, and a quadrature phase adjustment are determined and applied.
Public/Granted literature
- US20180137902A1 MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRONOUS TIMING REFERENCES Public/Granted day:2018-05-17
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