Invention Grant
- Patent Title: Semiconductor package structure and method for manufacturing the same
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Application No.: US15870315Application Date: 2018-01-12
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Publication No.: US10651052B2Publication Date: 2020-05-12
- Inventor: Wen Hung Huang , Yan Wen Chung
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/48 ; H01L23/498 ; H01L23/66 ; H01L21/683 ; H01L21/56 ; H01L23/00 ; H01L23/31

Abstract:
A semiconductor package structure includes a first insulating layer, a first conductive layer, a multi-layered circuit structure, a protection layer, and a semiconductor chip electrically connected to the multi-layered circuit structure. The first insulating layer defines a first through hole extending through the first insulating layer. The first conductive layer includes a conductive pad disposed in the first through hole and a trace disposed on an upper surface of the first insulating layer. The multi-layered circuit structure is disposed on an upper surface of the first conductive layer. The multi-layered circuit structure includes a bonding region disposed on the conductive pad of the first conductive layer and an extending region disposed on the trace of the first conductive layer. The protection layer covers the upper surface of the first insulating layer and the extending region of the multi-layered circuit structure, and exposes the bonding region of the multi-layered circuit structure.
Public/Granted literature
- US20190221446A1 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2019-07-18
Information query
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