Invention Grant
- Patent Title: High-voltage drain extended MOS transistor
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Application No.: US15876989Application Date: 2018-01-22
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Publication No.: US10651274B2Publication Date: 2020-05-12
- Inventor: Sunglyong Kim , Seetharaman Sridhar , Sameer Pendharkar
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Andrew R. Ratson; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/08 ; H01L29/78 ; H01L29/10 ; H01L29/06 ; H01L21/265 ; H01L29/40 ; H01L29/423

Abstract:
A semiconductor device includes a MOS transistor located within a semiconductor substrate of a first conductivity type. The transistor includes a body well located between a drain well and a substrate contact well. A buried voltage blocking region of a second conductivity type is located within the substrate and is connected to the body well. The buried voltage blocking region extends toward the substrate contact well, with an unmodified portion of the substrate remaining between the voltage blocking region and the substrate contact well.
Public/Granted literature
- US20190206997A1 HIGH-VOLTAGE DRAIN EXTENDED MOS TRANSISTOR Public/Granted day:2019-07-04
Information query
IPC分类: