Invention Grant
- Patent Title: Interference mitigation
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Application No.: US16312686Application Date: 2017-06-14
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Publication No.: US10652055B2Publication Date: 2020-05-12
- Inventor: Bernard Arambepola , Thushara Hewavithana
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Eschweiler & Potashnik, LLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@7b237940
- International Application: PCT/EP2017/064539 WO 20170614
- International Announcement: WO2018/015076 WO 20180125
- Main IPC: H04L25/08
- IPC: H04L25/08 ; H04B1/10 ; H04L5/00 ; H04L7/00 ; H04L5/14 ; H04L25/02 ; H04L25/03
Abstract:
Symbols are received on a downstream channel. A value of a channel synchronization parameter is determined based on the received symbols. An interference event on the downstream channel is detected. In response to detecting the interference event: an output signal is determined based on at least one cached value of the channel synchronization parameter, the at least one cached value being determined based on symbols received prior to and offset from the detecting of the interference event.
Public/Granted literature
- US20190334746A1 INTERFERENCE MITIGATION Public/Granted day:2019-10-31
Information query
