Invention Grant
- Patent Title: Method and system for checking errors on cables
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Application No.: US16041065Application Date: 2018-07-20
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Publication No.: US10657080B2Publication Date: 2020-05-19
- Inventor: Ching-Chih Shih , Lien-Hsun Chen , Chiao-Lun Tsai
- Applicant: QUANTA COMPUTER INC.
- Applicant Address: TW Taoyuan
- Assignee: QUANTA COMPUTER INC.
- Current Assignee: QUANTA COMPUTER INC.
- Current Assignee Address: TW Taoyuan
- Agency: Nixon Peabody LLP
- Agent Zhou Lu
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G06F13/42 ; G06F13/38 ; G06F13/10 ; G06F13/40

Abstract:
A system and method for insuring efficiency of a serial link between a host server and a switch is disclosed. A fabric switch has upstream ports associated with a serial link. A fabric controller is coupled to the switch. A host server includes a BIOS and a management controller. The host server has ports coupled to the serial link ports via cables to form lanes of the serial link. A memory is accessible by the controller and the management controller. The management controller reads an expected speed and width of the serial link from the memory. The BIOS determines an actual speed and width of the serial link. The management controller sends an error message if the actual speed and width do not match the expected speed and width.
Public/Granted literature
- US20190303315A1 METHOD AND SYSTEM FOR CHECKING ERRORS ON CABLES Public/Granted day:2019-10-03
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