Invention Grant
- Patent Title: Integrated circuit with airgaps to control capacitance
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Application No.: US16021352Application Date: 2018-06-28
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Publication No.: US10665499B2Publication Date: 2020-05-26
- Inventor: Miriam R. Reshotko , Nafees A. Kabir , Manish Chandhok
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/311 ; H01L23/532 ; H01L23/522 ; H01L23/482

Abstract:
An embodiment includes first, second, and third metal layers; first, second, and third metal lines included in the second metal layer; a layer including airgaps, the first metal layer being between the layer including airgaps and the second metal layer; a first void between the first and second metal lines and a second void between the second and third metal lines; a conformal layer between the first and second metal lines; an additional layer between the first and second metal layers; wherein the first void includes air and the second void includes air; wherein a first axis intersects the first, second, and third metal lines and the first and second voids; wherein a second axis, orthogonal to the first axis, intersects the conformal layer and the additional layer; wherein a third axis, orthogonal to the first axis, intersects the second metal line and the additional layer.
Public/Granted literature
- US20200006115A1 Integrated Circuit with Airgaps to Control Capacitance Public/Granted day:2020-01-02
Information query
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