Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US16180580Application Date: 2018-11-05
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Publication No.: US10665684B2Publication Date: 2020-05-26
- Inventor: Shunpei Yamazaki , Kengo Akimoto , Daisuke Kawae
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@131d273d
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/49 ; H01L29/417 ; H01L27/12 ; H01L51/05 ; H01L51/10 ; H01L21/02

Abstract:
A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
Public/Granted literature
- US20190074361A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-03-07
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