Invention Grant
- Patent Title: Secure electronic chip
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Application No.: US15137789Application Date: 2016-04-25
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Publication No.: US10691840B2Publication Date: 2020-06-23
- Inventor: Alexandre Sarafianos , Jimmy Fort , Clement Champeix , Jean-Max Dutertre , Nicolas Borrel
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee Address: FR Rousset
- Agency: Seed Intellectual Property Law Group LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@3efeee64
- Main IPC: G06F21/86
- IPC: G06F21/86 ; G09C1/00 ; H04L9/00 ; H01L23/00 ; H03K5/153 ; H03K5/24

Abstract:
A secure electronic chip including a plurality of biased semiconductor wells and a well biasing current detection circuit. Each of the wells includes a transistor and a bias contact electrically isolated from the transistor. The detection circuit is electrically coupled to each bias contact and is configured to detect a bias current passing through the bias contact that is indicative of an attempt to tamper with the electronic chip.
Public/Granted literature
- US20170116439A1 SECURE ELECTRONIC CHIP Public/Granted day:2017-04-27
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