Porous silicon dicing
Abstract:
A method of dicing a semiconductor wafer may include forming a porous silicon layer along an outline of dies singulated from the semiconductor wafer. The method may include sealing an active surface of the semiconductor wafer, including the porous silicon layer. The method may further include back grinding a rear surface of the semiconductor wafer to expose the porous silicon layer along the outline of the dies. The method also includes etching the semiconductor wafer to release the dies.
Public/Granted literature
Information query
Patent Agency Ranking
0/0