Invention Grant
- Patent Title: Fine line patterning methods
-
Application No.: US16178417Application Date: 2018-11-01
-
Publication No.: US10707081B2Publication Date: 2020-07-07
- Inventor: Shih-Chun Huang , Chiu-Hsiang Chen , Ya-Wen Yeh , Yu-Tien Shen , Po-Chin Chang , Chien Wen Lai , Wei-Liang Lin , Ya Hui Chang , Yung-Sung Yen , Li-Te Lin , Pinyen Lin , Ru-Gun Liu , Chin-Hsiang Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/033
- IPC: H01L21/033 ; H01L29/66 ; H01L21/027 ; H01L21/311 ; H01L21/02 ; H01L21/265 ; H01L21/3115

Abstract:
A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.
Public/Granted literature
- US20190148147A1 FINE LINE PATTERNING METHODS Public/Granted day:2019-05-16
Information query
IPC分类: