- 专利标题: Techniques for hardware video encoding
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申请号: US15483146申请日: 2017-04-10
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公开(公告)号: US10715818B2公开(公告)日: 2020-07-14
- 发明人: James M. Holland , Fangwen Fu , Satya N. Yedidi , Srinivasan Embar Raghukrishnan
- 申请人: INTEL CORPORATION
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: International IP Law Group, P.L.L.C.
- 主分类号: H04N19/176
- IPC分类号: H04N19/176 ; H04N19/523 ; H04N19/146 ; H04N19/103 ; H04N19/43
摘要:
An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder comprises at least a fixed function dual hierarchical motion estimation search units, dual integer motion estimation search units, and a fractional motion estimation search unit. Moreover, the hardware bit packing unit is to pack bits as coded according to the final macroblock coding decision into a data format.
公开/授权文献
- US20180041770A1 TECHNIQUES FOR HARDWARE VIDEO ENCODING 公开/授权日:2018-02-08
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