A memory module includes a plurality of semiconductor memory devices associated with a same module board. The plurality of semiconductor memory devices configured to simultaneously perform a training operation, the plurality of semiconductor memory devices including a reception interface circuit configured to perform the training operation to search for selected equalization coefficients of an equalizer based on a training pattern from a memory controller, and transmit a training information signal to the memory controller in a training mode in response to a training command from the memory controller, the training information signal including the selected equalization coefficients.