An integrated circuit comprising a memory array configured to store data chunks with corresponding error correction codes and error correction logic includes control logic that executes a recovery procedure to access a selected data chunk and corresponding error correction code from the memory array, to utilize the error correction logic to identify a location in the memory array of an error bit in the selected data chunk, and to access the identified location to write the corrected data. The recovery procedure is sequentially applied to a plurality of data chunks over a recovery operation region designated for a given instance of the recovery operation. Memory coupled with the control logic can store one or more recovery parameters that identify the recovery operation region in the memory.