Invention Grant
- Patent Title: Nanosheet CMOS device and method of forming
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Application No.: US16357682Application Date: 2019-03-19
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Publication No.: US10741558B2Publication Date: 2020-08-11
- Inventor: Hsin-Che Chiang , Chun-Sheng Liang , Kuo-Hua Pan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/78 ; H01L29/16 ; H01L29/24 ; H01L29/49 ; H01L29/66 ; H01L21/02 ; H01L21/28 ; H01L21/8238 ; H01L29/06

Abstract:
A method of forming a semiconductor device includes providing a fin extruding from a substrate, the fin having first epitaxial layers alternating with second epitaxial layers, the first epitaxial layers including a first semiconductor material, the second epitaxial layers including a second semiconductor material different from the first semiconductor material; etching sidewalls of at least one of the second epitaxial layers in a channel region of the fin, such that a width of the at least one of the second epitaxial layers in the channel region after etching is smaller than a width of the first epitaxial layers contacting the at least one of the second epitaxial layers; and forming a gate stack over of the fin, the gate stack engaging both the first epitaxial layers and the second epitaxial layers.
Public/Granted literature
- US20200058653A1 Nanosheet CMOS Device and Method of Forming Public/Granted day:2020-02-20
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