Invention Grant
- Patent Title: Fin isolation structures of semiconductor devices
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Application No.: US16204892Application Date: 2018-11-29
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Publication No.: US10755983B2Publication Date: 2020-08-25
- Inventor: Kuo-Cheng Chiang , Chih-Hao Wang , Kuan-Lun Cheng , Yen-Ming Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8234 ; H01L27/088 ; H01L29/66 ; H01L21/02 ; H01L21/762

Abstract:
A method of forming a fin field effect transistor (finFET) on a substrate includes forming a fin structure on the substrate and forming a shallow trench isolation (STI) region on the substrate. First and second fin portions of the fin structure extend above a top surface of the STI region. The method further includes oxidizing the first fin portion to convert a first material of the first fin portion to a second material. The second material is different from the first material of the first fin portion and a material of the second fin portion. The method further includes forming an oxide layer on the oxidized first fin portion and the second fin portion and forming first and second polysilicon structures on the oxide layer.
Public/Granted literature
- US20190096769A1 FIN ISOLATION STRUCTURES OF SEMICONDUCTOR DEVICES Public/Granted day:2019-03-28
Information query
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