Invention Grant
- Patent Title: Semiconductor package and method for manufacturing the same
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Application No.: US16521526Application Date: 2019-07-24
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Publication No.: US10756054B1Publication Date: 2020-08-25
- Inventor: Wen Hung Huang
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/00

Abstract:
A semiconductor package includes a core layer having a first surface and a second surface opposite to the first surface. The core layer includes a cavity. A first die is in the cavity. A first gap is between a sidewall of the cavity and a sidewall of the first die. A filling material is in the first gap. The filling material includes a first dimple in proximal to the second surface of the core layer. A first buffer layer on the second surface of the core layer. The first buffer layer has a bottom surface in proximal to the first die and a top surface opposite to the bottom surface. The first buffer layer filling the first dimple. A method for manufacturing a semiconductor package is also disclosed.
Information query
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