Invention Grant
- Patent Title: Single plate configuration and memory array operation
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Application No.: US15845893Application Date: 2017-12-18
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Publication No.: US10762944B2Publication Date: 2020-09-01
- Inventor: Ferdinando Bedeschi , Efrem Bolandrina
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G11C11/22
- IPC: G11C11/22 ; G06F13/16

Abstract:
Methods, systems, and devices for a single plate configuration and memory array operation are described. A non-volatile memory array may utilize a single plate to cover a subset of the array. One or more memory cells of the subset may be selected by operating the plate and an access line of an unselected memory cell at a fixed voltage. A second voltage may be applied to an access line of the selected cell, and subsequently reduced to perform an access operation. Removing the applied voltage may allow for the memory cell to undergo a recovery period prior to a subsequent access operation.
Public/Granted literature
- US20190189177A1 SINGLE PLATE CONFIGURATION AND MEMORY ARRAY OPERATION Public/Granted day:2019-06-20
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