Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
-
Application No.: US16691518Application Date: 2019-11-21
-
Publication No.: US10797008B2Publication Date: 2020-10-06
- Inventor: Po-Yuan Teng , Hao-Yi Tsai , Tin-Hao Kuo , Ching-Yao Lin , Teng-Yuan Lo , Chih Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/00 ; H01L23/31 ; H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L25/11

Abstract:
A manufacturing method of a semiconductor package includes at least the following steps. A dielectric layer is formed on a conductive pattern and in a space between the conductive pattern, where a concave area of the dielectric layer is formed corresponding to the space between the conductive pattern. A semiconductor die is disposed on the concave area of the dielectric layer with a die attach material interposed therebetween. A pressure is applied to the die attach material so that the concave area of the dielectric layer is filled with the die attach material, and a portion of the die attach material is extruded from the concave area to expand wider than an area of the semiconductor die. An insulating encapsulant is formed on the dielectric layer to cover the semiconductor die. Other methods for forming a semiconductor package are also provided.
Public/Granted literature
- US20200091091A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-03-19
Information query
IPC分类: