Invention Grant
- Patent Title: Low-power and high-density core-power lowering for memory write assist
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Application No.: US16269463Application Date: 2019-02-06
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Publication No.: US10832764B2Publication Date: 2020-11-10
- Inventor: Adithya Bhaskaran , Mukund Narasimhan , Shiba Narayan Mohanty
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: Qualcomm Incorporated
- Current Assignee: Qualcomm Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: G11C11/419
- IPC: G11C11/419 ; G11C7/12 ; G11C5/14 ; G05F3/26
Abstract:
A memory is provided that includes a current mirror that controls the amount of current conducted by a head-switch transistor for a memory power supply rail during a core-power-lowering write assist period.
Public/Granted literature
- US20200251163A1 LOW-POWER AND HIGH-DENSITY CORE-POWER LOWERING FOR MEMORY WRITE ASSIST Public/Granted day:2020-08-06
Information query
IPC分类:
