- Patent Title: Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas
-
Application No.: US15942475Application Date: 2018-03-31
-
Publication No.: US10854522B1Publication Date: 2020-12-01
- Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
- Applicant: PDF Solutions, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: PDF Solutions, Inc.
- Current Assignee: PDF Solutions, Inc.
- Current Assignee Address: US CA Santa Clara
- Agent David Garrod, Esq.
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L21/66 ; H01L27/118 ; H01L29/417 ; H01L27/02 ; G06F11/07 ; H01L29/06 ; G06F30/30 ; G06F30/39 ; G06F30/392 ; G06F30/398
Abstract:
A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas.
Information query
IPC分类:
