- 专利标题: Sample-hold circuit and AD converter
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申请号: US16570379申请日: 2019-09-13
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公开(公告)号: US10886939B2公开(公告)日: 2021-01-05
- 发明人: Naoya Waki
- 申请人: Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
- 申请人地址: JP Tokyo; JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba,Toshiba Electronic Devices & Storage Corporation
- 当前专利权人: Kabushiki Kaisha Toshiba,Toshiba Electronic Devices & Storage Corporation
- 当前专利权人地址: JP Tokyo; JP Tokyo
- 代理机构: White & Case LLP
- 优先权: JP2019-050984 20190319
- 主分类号: H03M1/00
- IPC分类号: H03M1/00 ; H03M3/00
摘要:
According to an embodiment, a sample-hold circuit according to this embodiment is made up of a first device having a first withstand voltage and a second device having a second withstand voltage lower than the first withstand voltage. The sample-hold circuit includes a first switch element, a first capacitor, a second switch element, a third switch element, and a fourth switch element. The first switch element has the first withstand voltage. The first switch element operates upon receiving a first signal output from the device having the first withstand voltage. The second switch element has the first withstand voltage. The third switch element has the second withstand voltage. The fourth switch element has the second withstand voltage.
公开/授权文献
- US20200304140A1 SAMPLE-HOLD CIRCUIT AND AD CONVERTER 公开/授权日:2020-09-24
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