A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.