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公开(公告)号：US12046169B2
公开(公告)日：2024-07-23
申请号：US18114241
申请日：2023-02-25
发明人： Kihyun Pyun , Sung-Mo Yang
IPC分类号： G09G3/00 , G09G3/3233 , H10K59/131
CPC分类号： G09G3/006 , G09G3/3233 , G09G2300/0842 , G09G2330/021 , G09G2330/025 , G09G2330/045 , G09G2330/08 , G09G2330/12 , H10K59/131
摘要： A display device includes: a display panel including first and second wirings; a control circuit board spaced apart from the display panel and including a power management circuit which provides a driving voltage to the first and second wirings; a first cable coupled to the control circuit board and electrically connecting the power management circuit and the first wiring; a second cable coupled to the control circuit board and electrically connecting the power management circuit and the second wiring; an abnormal coupling detector connected between the first and second wirings and generating first and second protection signals based on a difference between a first voltage of the first wiring and a second voltage of the second wiring; and a voltage supply controller counting the first and second protection signals, and providing a shutdown signal to the power management circuit such that the power management circuit stops providing the driving voltage.
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公开(公告)号：US11908383B2
公开(公告)日：2024-02-20
申请号：US18083296
申请日：2022-12-16
发明人： Kihyun Pyun , Jang-Mi Lee
IPC分类号： G09G3/20
CPC分类号： G09G3/2096 , G09G2310/08 , G09G2330/028 , G09G2360/12
摘要： A display device is disclosed that includes a display panel, a data driver, a timing controller, a memory device, and a power voltage generator. The display panel includes pixels. The data driver is configured to apply data voltages to the pixels. The timing controller is configured to control the data driver, to generate a test strobe signal by shifting a phase of a strobe signal, to perform a test write operation and a test read operation with the memory device based on the test strobe signal, and to increase a power voltage when an error bit occurs in the test write operation and the test read operation. The memory device is configured to sample memory data received from the timing controller using the strobe signal and to store sampled memory data. The power voltage generator is configured to apply the power voltage to the memory device.
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公开(公告)号：US11900850B2
公开(公告)日：2024-02-13
申请号：US18120559
申请日：2023-03-13
发明人： Kihyun Pyun , Sung-Mo Yang
IPC分类号： G09G3/20
CPC分类号： G09G3/2007 , G09G3/2092 , G09G2300/0828 , G09G2310/0243 , G09G2310/0275 , G09G2310/08 , G09G2320/0271 , G09G2330/028 , G09G2330/04 , G09G2360/16
摘要： A display device may include a display panel which displays an image based on a data voltage, a driving controller including a net power control setter which determines a scale factor for adjusting a gray scale of (N+1)th frame data based on a load of Nth frame data and a net power control reference value, where the driving controller generates a data signal based on input image data, and N is a natural number greater than or equal to 2, a data driver which converts the data signal into the data voltage and outputs the data voltage to the display panel, and a power supply voltage generator which senses a power supply current applied to the display panel in an Nth frame and generates a power supply voltage based on a current level of the power supply current.
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公开(公告)号：US11817051B1
公开(公告)日：2023-11-14
申请号：US18148076
申请日：2022-12-29
发明人： Kihyun Pyun , Jang-Hoon Kwak
IPC分类号： G09G3/20 , G09G5/10 , G09G3/3225
CPC分类号： G09G3/3225 , G09G2310/08 , G09G2320/0673 , G09G2330/021 , G09G2360/16
摘要： A display device and driving method may include a display panel, a voltage curve controller generating compensated voltage curves including a first compensated voltage curve having a second point with respect to a maximum grayscale and a fourth point with respect to an intermediate grayscale generated by normalizing a first point and a third point of a first reference voltage curve with respect to a peak white grayscale and a full white grayscale based on an entire grayscale, and a driving voltage controller generating a driving voltage from the compensated voltage curves based on a load of the input image data and a maximum grayscale value of the input image data.
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公开(公告)号：US11069304B2
公开(公告)日：2021-07-20
申请号：US16790525
申请日：2020-02-13
发明人： Dae-Sik Lee , Yoongu Kim , Seung Young Choi , Keunoh Kang , Kihyun Pyun
摘要： A light source apparatus includes a light source and a light source driver. The light source includes a plurality of scan blocks. Each scan block includes a plurality of local dimming blocks. The light source driver includes a plurality of channels configured to output light source driving signals to the plurality of local dimming blocks. The light source driving signal includes a light source intensity value representing a light intensity of a local dimming block from among the plurality of local dimming blocks and a delay value representing a degree of a delay of the local dimming block. The delay value is determined by a scan delay value varied according to the plurality of scan blocks and a delay parameter.
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公开(公告)号：US10923074B2
公开(公告)日：2021-02-16
申请号：US16354358
申请日：2019-03-15
发明人： Kihyun Pyun , Seung-woon Shin , Eui-myeong Cho
摘要： A receiving circuit includes a first capacitor connected to a first signal line, a second capacitor connected to a second signal line. A first bias control circuit may convert a common mode voltage of a first received signal provided through the first capacitor to a first voltage level to output a first biased signal. A second bias control circuit may convert a common mode voltage of a second received signal provided through the second capacitor to a second voltage level to output a second biased signal. A balance compensation circuit may receive the first biased signal and the second biased signal, compensate for an offset voltage of the first biased signal based on the second biased signal, and compensate for an offset voltage of the second biased signal based on the first biased signal to output a first differential signal and a second differential signal.
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公开(公告)号：US10923067B2
公开(公告)日：2021-02-16
申请号：US16216158
申请日：2018-12-11
发明人： Sujin Lee , Kihyun Pyun , Keunoh Kang
摘要： A display device includes a display panel including a plurality of pixels, a gate driver configured to provide gate signals to the plurality of pixels, a data driver configured to generate a first initialization completion signal, and to provide data signals to the plurality of pixels, and a controller configured to generate a second initialization completion signal in response the first initialization completion signal and a state signal, and to control the gate driver and the data driver in response to the second initialization completion signal. The first initialization completion signal is activated when an initialization operation of the data driver is completed, and the state signal is activated when an initialization operation of the controller is completed.
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公开(公告)号：US10896636B2
公开(公告)日：2021-01-19
申请号：US16840837
申请日：2020-04-06
发明人： Kihyun Pyun , Hyeon-Do Park
摘要： A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.
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公开(公告)号：US10127872B2
公开(公告)日：2018-11-13
申请号：US15684139
申请日：2017-08-23
发明人： Kihyun Pyun , Seung-Woon Shin
IPC分类号： G06F3/038 , G09G3/36 , G02F1/1362 , G02F1/1335 , G02F1/163
摘要： A display apparatus includes a display panel, a data driving part and a gate driving part. The gate driving part outputs gate signals to gate lines, respectively, increases the gate signal from a first gate off voltage to a gate on voltage, decreases the gate signal from the gate on voltage to the first gate off voltage, decreases the gate signal from the first gate off voltage to a second gate off voltage in a slope less than a slope in which the gate signal decreases from the gate on voltage to the first gate off voltage, during P (P is a natural number) horizontal time in which P gate line of the gate lines is driven, and increases the gate signal from the second gate off voltage to the first gate off voltage.
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公开(公告)号：US09691316B2
公开(公告)日：2017-06-27
申请号：US14791065
申请日：2015-07-02
发明人： Kihyun Pyun , Tongill Kwak
CPC分类号： G09G3/20 , G09G2310/027 , G09G2310/08 , G09G2370/08
摘要： Provided is a display device including a timing controller configured to output a clock synchronizing signal for a clock data recovery operation, and a plurality of source driving chips configured to perform the clock data recovery operation in response to the clock synchronizing signal, wherein each of the source driving chips includes a filter unit configured to determine whether the first and second detection signals are activated or deactivated in response to a voltage level of the clock synchronizing signal and to output an operation signal according to a comparative result of the first and second detection signals, and an internal clock generator configured to perform the clock data recovery operation in response to the activation state of the operation signal.
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