Invention Grant
- Patent Title: Maintaining proper voltage sequence during sudden power loss
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Application No.: US16225047Application Date: 2018-12-19
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Publication No.: US10908665B2Publication Date: 2021-02-02
- Inventor: Horthense D. Tamdem , Pavan Kumar
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patent Capital Group
- Main IPC: G06F1/30
- IPC: G06F1/30 ; G06F1/28 ; G05F1/569 ; G01R19/165 ; G06F1/26 ; H02J1/14

Abstract:
Various embodiments comprise a protective circuit to connect at least two voltage rails to each other upon detection of the loss of the supply voltage that provides input power to the voltage regulators. The protective circuit may cause the two outputs of the voltage regulators to be connected to each other through a resistor when such a loss occurs. This in turn may prevent possible circuit damage in the load by preventing the higher output voltage from dropping below the lower output voltage if the capacitors on the outputs of the voltage regulators discharge at different rates. Such a reverse-voltage condition might otherwise cause damage in the load circuitry.
Public/Granted literature
- US20190129487A1 MAINTAINING PROPER VOLTAGE SEQUENCE DURING SUDDEN POWER LOSS Public/Granted day:2019-05-02
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