- 专利标题: Layered boundary interconnect
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申请号: US16388474申请日: 2019-04-18
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公开(公告)号: US10929331B1公开(公告)日: 2021-02-23
- 发明人: Rafael C. Camarota
- 申请人: Xilinx, Inc.
- 申请人地址: US CA San Jose
- 专利权人: Xilinx, Inc.
- 当前专利权人: Xilinx, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Patterson + Sheridan, LLP
- 主分类号: G06F13/42
- IPC分类号: G06F13/42 ; G06F13/20
摘要:
Examples described herein generally relate to a layered boundary interconnect in an integrated circuit (IC) and methods for operating such IC. In an example, an IC includes a programmable logic region, a plurality of input/output circuits, a plurality of hard block circuits, and a programmable native transmission network. The programmable native transmission network is connected to and between the plurality of input/output circuits and the plurality of hard block circuits. The plurality of hard block circuits is connected to and between the programmable native transmission network and the programmable logic region.
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