Invention Grant
- Patent Title: Apparatuses including buried digit lines
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Application No.: US16414417Application Date: 2019-05-16
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Publication No.: US10930652B2Publication Date: 2021-02-23
- Inventor: Shyam Surthi , Suraj Mathew
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L27/105
- IPC: H01L27/105 ; H01L21/768 ; H01L21/74 ; H01L27/108

Abstract:
Methods of forming semiconductor device structures include forming trenches in an array region and in a buried digit line end region, forming a metal material in the trenches, filling the trenches with a mask material, removing the mask material in the trenches to expose a portion of the metal material, and removing the exposed portion of the metal material. A plurality of conductive contacts is formed in direct contact with the metal material in the buried digit line end region. Methods of forming a buried digit line contact include forming conductive contacts physically contacting metal material in trenches in a buried digit line end region. Vertical memory devices and apparatuses include metallic connections disposed between a buried digit line and a conductive contact in a buried digit line end region.
Public/Granted literature
- US20190273080A1 APPARATUSES INCLUDING BURIED DIGIT LINES Public/Granted day:2019-09-05
Information query
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