Invention Grant
- Patent Title: Back power protection circuit
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Application No.: US15443161Application Date: 2017-02-27
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Publication No.: US10938200B2Publication Date: 2021-03-02
- Inventor: Amit Kumar Srivastava , Karthik Ns , Raghavendra Devappa Sharma , Dharmaray Nedalgi , Prasad Bhilawadi
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- Main IPC: G06K19/00
- IPC: G06K19/00 ; H02H3/18 ; G06F1/26 ; G06F1/3212 ; H04B1/38 ; H04L25/02
Abstract:
Described is an apparatus which comprises: one or more signal lines; a transceiver coupled to the one or more signal lines; and a bias generation circuit to provide one or more bias voltages for the transceiver to tri-state the transceiver according to signal attributes of the one or more signal lines.
Public/Granted literature
- US20170170646A1 BACK POWER PROTECTION CIRCUIT Public/Granted day:2017-06-15
Information query
