Invention Grant
- Patent Title: Retaining memory during partial reconfiguration
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Application No.: US16262420Application Date: 2019-01-30
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Publication No.: US10963170B2Publication Date: 2021-03-30
- Inventor: Subodh Kumar , David P. Schultz , Weiguang Lu , Michelle Zeng
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Embodiments herein describe a reconfigurable integrated circuit (IC) where data can be retained in memory when performing a partial reconfiguration. Partial reconfiguration includes reconfiguring programmable logic in the IC while certain functions of the IC remain operational or active. In one embodiment, the reconfigurable IC includes control logic for saving or retaining data in the IC during a partial reconfiguration. That is, rather than clearing the memory elements, the user can specify that the memory blocks containing certain data should be retained while the other memory blocks can be cleared. In this manner, the data can be retained in the IC during a partial reconfiguration which saves time, power, and cost. Once partial reconfiguration is complete, the newly configured programmable logic can retrieve and process the saved data from the on-chip memory.
Public/Granted literature
- US20200241770A1 RETAINING MEMORY DURING PARTIAL RECONFIGURATION Public/Granted day:2020-07-30
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