A request to apply a plurality of voltage pulses to memory cells of a memory device can be received. A number of the voltage pulses can be applied the memory cells of the memory device, where a voltage pulse of the number of the voltage pulses places the memory cells of the memory device at a voltage level associated with a defined voltage state. A set of bit error rates associated with the memory cells of the memory device at the voltage level can be determined. Responsive to determining that the set of bit error rates does not satisfy a threshold condition, an additional number of the voltage pulses to the memory cells of the memory device can be applied.