Invention Grant
- Patent Title: Two pin scan interface for low pin count devices
-
Application No.: US16165058Application Date: 2018-10-19
-
Publication No.: US10976366B2Publication Date: 2021-04-13
- Inventor: Patrick J. de Bakker , Michael R. May
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Zagorin Cave LLP
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3177 ; G01R31/317

Abstract:
A scan controller provides a translation between a two terminal external interface and a four signal line internal scan interface to a digital core of the integrated circuit. The two terminal external interface has an input terminal and an input/output terminal. The input terminal receives a clock signal and the input/output terminal serially receives a scan enable signal and a scan in data bit. A state machine controls the scan controller. The scan in data bit, the scan enable signal, and a scan clock signal are supplied in parallel to the internal scan interface. The digital logic provides a scan out data bit and the scan controller supplies the scan out data bit over the input/output terminal in synchronism with the clock signal.
Information query