Invention Grant
- Patent Title: Small multiplier after initial approximation for operations with increasing precision
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Application No.: US14516643Application Date: 2014-10-17
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Publication No.: US10983756B2Publication Date: 2021-04-20
- Inventor: Leonard Rarick
- Applicant: Imagination Technologies, Limited
- Applicant Address: GB Kings Langley
- Assignee: Imagination Technologies, Limited
- Current Assignee: Imagination Technologies, Limited
- Current Assignee Address: GB Kings Langley
- Agency: Potomac Law Group, PLLC
- Agent Vincent M DeLuca
- Main IPC: G06F7/552
- IPC: G06F7/552 ; G06F7/523 ; G06F7/537

Abstract:
In an aspect, a processor includes circuitry for iterative refinement approaches, e.g., Newton-Raphson, to evaluating functions, such as square root, reciprocal, and for division. The circuitry includes circuitry for producing an initial approximation; which can include a LookUp Table (LUT). LUT may produce an output that (with implementation-dependent processing) forms an initial approximation of a value, with a number of bits of precision. A limited-precision multiplier multiplies that initial approximation with another value; an output of the limited precision multiplier goes to a full precision multiplier circuit that performs remaining multiplications required for iteration(s) in the particular refinement process being implemented. For example, in division, the output being calculated is for a reciprocal of the divisor. The full-precision multiplier circuit requires a first number of clock cycles to complete, and both the small multiplier and the initial approximation circuitry complete within the first number of clock cycles.
Public/Granted literature
- US20160110163A1 SMALL MULTIPLIER AFTER INITIAL APPROXIMATION FOR OPERATIONS WITH INCREASING PRECISION Public/Granted day:2016-04-21
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