- 专利标题: Method of manufacturing SiC epitaxial wafer
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申请号: US16672650申请日: 2019-11-04
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公开(公告)号: US10985079B2公开(公告)日: 2021-04-20
- 发明人: Yoshitaka Nishihara
- 申请人: SHOWA DENKO K.K.
- 申请人地址: JP Tokyo
- 专利权人: SHOWA DENKO K.K.
- 当前专利权人: SHOWA DENKO K.K.
- 当前专利权人地址: JP Tokyo
- 代理机构: Sughrue Mion, PLLC
- 优先权: JPJP2018-211273 20181109
- 主分类号: H01L21/66
- IPC分类号: H01L21/66 ; H01L21/02
摘要:
The invention provides a method of manufacturing a SiC epitaxial wafer in which stacking faults are less likely to occur when a current is passed in a forward direction. The method of manufacturing the SiC epitaxial wafer includes a measurement step for measuring a basal plane dislocation density, a layer structure determining process for determining the layer structure of the epitaxial layer, and an epitaxial growth step for growing the epitaxial layers. And in the layer structure determination step, in the case of (i) when the basal plane dislocation density is lower than a predetermined value, the epitaxial layer includes a conversion layer and a drift layer from the SiC substrate side; and in the case of (ii) when the density is equal to or higher than the predetermined value, the epitaxial layer includes a conversion layer, a recombination layer, and a drift layer from the SiC substrate side.
公开/授权文献
- US20200152528A1 METHOD OF MANUFACTURING SIC EPITAXIAL WAFER 公开/授权日:2020-05-14
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