A dynamic gain cell memory cell capable of storing multiple values is described herein. In one example, a memory cell may include an input, such as a first transistor. The memory cell may further include a capacitive element coupled to the input, where the capacitive element stores one or more values corresponding to one of multiple voltage levels. A sense transistor configured to operate in source-follower mode may be coupled to the capacitive element, where the charge on the capacitive element controls operation of the sense transistor, such as through a gate of the sense transistor. The memory cell may further include an output connected to the drain of the sense transistor, where current flows through the transistor when the output is activated to access the one or more values stored in capacitive element.