Invention Grant
- Patent Title: Apparatuses and methods for providing bias signals in a semiconductor device
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Application No.: US16229266Application Date: 2018-12-21
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Publication No.: US10985753B2Publication Date: 2021-04-20
- Inventor: Kenji Asaki , Shuichi Tsukada
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H03K17/687
- IPC: H03K17/687 ; G11C7/12

Abstract:
Apparatuses and methods for providing bias signals in a semiconductor device are described. As example apparatus includes a power supply line configured to provide a supply voltage and further includes first and second nodes. An impedance element is coupled between the power supply line and the first node and a first transistor having a gate, a source coupled to the first node, and a drain coupled to the second node. A reference line is configured to provide a reference voltage. A second transistor has a gate, a source coupled to the reference line, and a drain. The gate and the drain of the second transistor are coupled to the gate of the first transistor.
Public/Granted literature
- US20190172507A1 APPARATUSES AND METHODS FOR PROVIDING BIAS SIGNALS IN A SEMICONDUCTOR DEVICE Public/Granted day:2019-06-06
Information query
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