Invention Grant
- Patent Title: Etch stop layer between substrate and isolation structure
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Application No.: US16690177Application Date: 2019-11-21
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Publication No.: US10991628B2Publication Date: 2021-04-27
- Inventor: Ming-Chang Wen , Chang-Yun Chang , Hsien-Chin Lin , Hung-Kai Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L21/762 ; H01L29/66 ; H01L29/49 ; H01L29/51

Abstract:
A device includes a substrate; semiconductor fins extending from the substrate; an isolation structure over the substrate and laterally between the semiconductor fins; a liner layer between sidewalls of the semiconductor fins and the isolation structure; and an etch stop layer between the substrate and the isolation structure and laterally between the semiconductor fins. The etch stop layer includes a material different than that of the isolation structure and the liner layer.
Public/Granted literature
- US20200091008A1 Etch Stop Layer Between Substrate and Isolation Structure Public/Granted day:2020-03-19
Information query
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