Invention Grant
- Patent Title: Vertically stacked devices with self-aligned regions formed by direct self assembly (DSA) processing
-
Application No.: US16473699Application Date: 2017-03-15
-
Publication No.: US10991696B2Publication Date: 2021-04-27
- Inventor: Aaron D. Lilak , Patrick Theofanis , Cory E. Weber , Stephen M. Cea , Rishabh Mehandru
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- International Application: PCT/US2017/022585 WO 20170315
- International Announcement: WO2018/169528 WO 20180920
- Main IPC: H01L27/105
- IPC: H01L27/105 ; H01L21/32 ; H01L27/11556 ; H01L27/11582 ; H01L29/78
Abstract:
An integrated circuit structure is provided which comprises: a stack of source regions of a stack of transistors and a stack of drain regions of the stack of transistors; and a gate stack that forms gate regions for the stack of transistors, wherein the gate stack comprises traces of a first polymer of a block copolymer, the block copolymer comprising the first polymer and a second polymer.
Public/Granted literature
- US20190341384A1 DIRECT SELF ASSEMBLY (DSA) PROCESSING OF VERTICALLY STACKED DEVICES WITH SELF-ALIGNED REGIONS Public/Granted day:2019-11-07
Information query
IPC分类:
