Invention Grant
- Patent Title: Low drop-out (LDO) voltage regulator circuit
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Application No.: US16525696Application Date: 2019-07-30
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Publication No.: US10996699B2Publication Date: 2021-05-04
- Inventor: Qing Liu , Yannick Guedon
- Applicant: STMicroelectronics Asia Pacific Pte Ltd
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Asia Pacific Pte Ltd
- Current Assignee: STMicroelectronics Asia Pacific Pte Ltd
- Current Assignee Address: SG Singapore
- Agency: Crowe & Dunlevy
- Main IPC: G05F1/575
- IPC: G05F1/575 ; H03F3/45

Abstract:
A low drop-out (LDO) voltage regulator circuit includes a power transistor having a control terminal configured to receive a control signal and an output terminal coupled to an output node. A current regulation loop senses current flowing through the power transistor and modulates the control signal to cause the power transistor to output a constant current to the output node. A voltage regulation loop senses voltage at the output node and modulates the control signal to cause the power transistor to deliver current to the output node so that an output voltage at the output node is regulated. The current regulation loop includes a bipolar transistor connected to the control terminal of the power transistor, where a base terminal of the bipolar transistor is driven by a signal dependent on a difference between the sensed current flowing through the power transistor and a reference.
Public/Granted literature
- US20210034087A1 LOW DROP-OUT (LDO) VOLTAGE REGULATOR CIRCUIT Public/Granted day:2021-02-04
Information query
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